Senior Principal Analog design engineer
NXP Semiconductors
Job Qualification
- 12+ years of Analog experience in high speed design of ethernet/Serdes blocks
- B.E/MS in Electronics/electricals Engineering
- Transistor level design knowledge and experience of standard analog building blocks including Bandgap references, current references, OPAMP, LDO, receiver front-end blocks PGA, CTLE and such for ultra-low noise performance in CMOS processes. Design experience in Ethernet/SerDes is a plus. Good knowledge on EMC/ESD concepts
- Experience with relevant CAD tools (including Cadence Virtuoso, SPICE, etc.).
- Experience on solving Product level EMC/ESD issues
- Proficient with using analog circuit design EDA tools such as Cadence ADE. Have knowledge of basic transistor models (CMOS).
- Experience with Analog circuit characterization/validation, Yield improvement , ATE characterization etc.
- Experience on Multi-gig ethernet is a plus.
- Transistor level design knowledge and experience of standard analog building blocks including Bandgap references, current references, OPAMP, LDO, receiver front-end blocks PGA, CTLE and such for ultra-low noise performance in CMOS Finfet processes
- Provide innovative Analog circutry solutions to address design challenges leading to continuous improvement of various design blocks and sub-systems.
- Work with the system and digital team in defining AFE interfaces and calibrations etc.
- End to end ownership of Analog design execution, performance and reliability verification.
- Guide/Mentor junior designer on Analog circuit design and concepts