RTL Design Engineer - SoC
Cyient
Remote
- Experience: 6-9 years.
- Good knowledge on the digital concepts and ASIC flow
- Experience in RTL coding
- Must have hands on experience with SoC design and integration.
- The candidate worked on ARM SoCs
- Peripherals including high speed ones like PCIe, USB
- Developing UPF with multiple power domains, including conducting UPF checks and power aware simulations
- Experience in Verilog/System-Verilog is a must.
- Basic knowledge on verification , functions and tasks
- Understanding of Memory controller designs
- Must have experience in Synthesis / Understanding of timing concepts