PCIe Verification (BB510FT RM 4464)
Source-Right
Education: B.S. in electrical engineering, computer science with extensive industry experience.
Candidates must be comfortable with the Hyderabad location.
Job Requirements
- An expert level experience with PCIe IP/sub-systems.
- Highly experienced with defining block, sub-system and SOC top level test plans.
- An expert level with developing UVM-based SV test-benches.
- Deep understanding and knowledge of verification methodologies flows and quality metrics.
- Great debugging and problem-solving skills.
- Team player with great interpersonal communication skills.
- At least 5-10 years of relevant experience in Nand, DDR and PCIe verification.
- Strong and relevant expertise with ASIC simulation tools and advanced verification methods.
- Expert level in verification languages such as UVM and System Verilog.
- Relevant experience with writing block-level and SoC test-plans.
- IP/Block/Subsystem Verification (RTL Front end verification) – minimum 5 years
- SV, UVM Verification – minimum 4 Years
- Interfaces (AXI/AHB) – minimum 2 years
- Protocols (PCIE) – minimum 2 years
- Scripting (Perl/Python) – Optional.