ASIC Design Engineer - Performance Monitoring
NVIDIA
What You'll Be Doing
- Be an integral part of the team defining and developing system-level RTL and methodologies to measure performance on the industry's leading GPUs/SOCs.
- Design and implement RTL features - work through the entire design cycle for SOC.
- Run and debug RTL checks to ensure design quality (e.g. CDC, RDC, Lint, Synthesis, Logic-Equivalence and more)
- Define, develop, and automate flows and methodologies to efficiently build and support a system-level IP
- Work with architects, designers, verification and SW engineers to accomplish your tasks.
- B.Tech or M.Tech in Electronics or Computer Engineering.
- 3+ years of relevant industry experience.
- Experienced in RTL design (Verilog), System-On-Chip design/implementation flows, and design automation.
- Good understanding of SOC/IP (u)architecture (e.g., data flow, control, multiple clock/power domains handling, latency analysis).
- Strong coding skills in Perl, Python or other industry-standard scripting languages.
- Excellent debugging and analytical skills.
- Exposure to design and verification tools (dc_shell or equivalent synthesis tools, VCS or equivalent simulation tools, debug tools like Debussy, GDB).
- Great communication and collaboration skills to interact within the team and with cross functional teams.
- Adept at using AI tools to enhance productivity and solve complicated problems
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